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PTN3363 데이터시트 (PDF) - NXP Semiconductors

PTN3363 Datasheet PDF - NXP Semiconductors
부품명 PTN3363
다운로드  PTN3363 다운로드
파일 크기   547.46 Kbytes
페이지   30 Pages
제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors
상세설명 Low power HDMI/DVI level shifter with active DDC buffer, supporting 3.4 Gbit/s operation

PTN3363 Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
PTN3363 Datasheet PDF - NXP Semiconductors

부품명 PTN3363
다운로드  PTN3363 Click to download

파일 크기   547.46 Kbytes
페이지   30 Pages
제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors
상세설명 Low power HDMI/DVI level shifter with active DDC buffer, supporting 3.4 Gbit/s operation

PTN3363 데이터시트 (HTML) - NXP Semiconductors


PTN3363 제품 세부 정보

General description
PTN3363 is a low power, high-speed level shifter device which converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.4b compliant open-drain current-steering differential output signals, up to 3.4 Gbit/s per lane to support 36-bit deep color mode, 4K x 2K video format or 3D video data transport. Each of these lanes provides a level-shifting differential active buffer, with built-in Equalization, to translate from low-swing AC-coupled differential signaling on the source side, to TMDS-type DC-coupled differential current-mode signaling terminated into 50  to 3.3 V on the sink side. Additionally, the PTN3363 provides a single-ended active buffer for voltage translation of the HPD signal from 5 V on the sink side to 3.3 V on the source side and provides a channel with active buffering and level shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V source-side and 5 V sink-side. The DDC channel is implemented using active I2C-bus buffer technology providing redriving and level shifting as well as disablement (isolation between source and sink) of the clock and data lines.
The low-swing AC-coupled differential input signals to the PTN3363 typically come from a display source with multi-mode I/O, which supports multiple display standards, for example, DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or HDMI v1.4b specification. By using PTN3363, chip set vendors are able to implement such reconfigurable I/Os on multi-mode display source devices, allowing the support of multiple display standards while keeping the number of chip set I/O pins low. See Figure 1.
The PTN3363 main high-speed differential lanes feature low-swing self-biasing differential inputs which are compliant to the electrical specifications of DisplayPort Standard v1.2a and/or PCI Express Standard v1.1, and open-drain current-steering differential outputs compliant to DVI v1.0 and HDMI v1.4b electrical specifications. The I2C-bus channel actively buffers as well as level-translates the DDC signals. The PTN3363 supports standby mode in order to minimize current consumption when Hot Plug Detect signal HPD_SINK is LOW.
PTN3363 is powered from a single 3.3 V power supply consuming a small amount of power (72 mW typical) and is offered in a 32-terminal HVQFN32 package.




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