Contains Eight D-Type Flip-Flops
With Single-Rail Outputs
Clock Enable Latched to Avoid False
Clocking
Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators
Buffered Common Enable Input
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs

description
The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The
SN74F377A features a latched clock enable (CE) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse if CE is low. Clock triggering occurs at a particular voltage level and is
not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input
signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE
input.
The SN74F377A is characterized for operation from 0°C to 70°C.