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1 Features
• LSTTL input logic compatible
– VIL(max) = 0.8 V, VIH(min) = 2 V
• CMOS input logic compatible
– II ≤ 1 μA at VOL, VOH
• Buffered inputs
• 4.5 V to 5.5 V operation
• Wide operating temperature range:
-55°C to +125°C
• Supports fanout up to 10 LSTTL loads
• Significant power reduction compared to LSTTL
logic ICs
2 Applications
• User fewer inputs to monitor error signals
• Combine active-low enable signals
3 Description
This device contains three independent 3-input OR
gates. Each gate performs the Boolean function
Y = A + B + C in positive logic.
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