FEATURES
• Single +3.0V Operation
• Selectable Full-Scale Input Swing
• 400 MHz −3 dB Input Bandwidth(1)
• Low Power Consumption
• Standby Mode
• On-Chip Reference and Sample-and-Hold
Amplifier sample•
Offset Binary or Two’s Complement Data
Format
• Separate Adjustable Output Driver Supply

KEY SPECIFICATIONS
• Resolution: 10 Bits
• Conversion Rate: 80 MSPS
• Full Power Bandwidth: 400 MHz
• DNL: ±0.25 LSB (typ)
• SNR (fIN = 10 MHz): 59.5 dB (typ)
• SFDR (fIN = 10 MHz): −78.7 dB (typ)
• Power Consumption, 80 Msps: 78.6 mW

APPLICATIONS
• Ultrasound and Imaging
• Instrumentation
• Cellular Base Stations/Communications
Receivers
• Sonar/Radar
• xDSL
• Wireless Local Loops
• Data Acquisition Systems
• DSP Front Ends

DESCRIPTION
The ADC10080 is a monolithic CMOS analog-to-
digital converter capable of converting analog input
signals into 10-bit digital words at 80 Megasamples
per second (MSPS). This converter uses a
differential, pipeline architecture with digital error
correction and an on-chip sample-and-hold circuit to provide a complete conversion solution and to
minimize power consumption, while providing
excellent dynamic performance. A unique sample•
and-hold stage yields a full-power bandwidth of 400
MHz. Operating on a single 3.0V power supply, this
device consumes just 78.6 mW at 80 MSPS,
including the reference current. The Standby feature
reduces power consumption to just 15 mW.
The differential inputs provide a full scale selectable
input swing of 2.0 VP-P, 1.5 VP-P, 1.0 VP-P, with the
possibility of a single-ended input. Full use of the
differential input is recommended for optimum
performance. An internal +1.2V precision bandgap
reference is used to set the ADC full-scale range, and
also allows the user to supply a buffered referenced
voltage for those applications requiring increased
accuracy. The output data format is user choice of
offset binary or two’s complement.
This device is available in the 28-lead TSSOP
package and will operate over the industrial
temperature range of −40°C to +85°C.