1 Features
• Low rDS(on): 1Ω (Typical)
• Output short-circuit protection
• Avalanche energy: 75mJ
• Eight 350mA DMOS outputs
• 50V Switching capability
• Enhanced cascading for multiple stages
• All registers cleared with single input
• Low power consumption

2 Application
• Instrumentation Clusters
• Tell-Tale Lamps
• LED Illumination and Controls
• Automotive Relay or Solenoids Drivers

3 Description
The TPIC6A596 is a monolithic, high-voltage, highcurrent
power logic 8-bit shift register designed for
use in systems that require relatively high load power.
The device contains a built-in voltage clamp on
the outputs for inductive transient protection. Power
driver applications include relays, solenoids, and
other medium- current or high-voltage loads. Each
open-drain DMOS transistor features an independent
chopping current-limiting circuit to prevent damage in
the case of a short circuit.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit, D-type storage
register. Data transfers through both the shift and
storage registers on the rising edge of the shiftregister
clock (SRCK) and the register clock (RCK),
respectively. The storage register transfers data to
the output buffer when shift-register clear (SRCLR) is
high. Write data and read data are valid only when
RCK is low. When SRCLR is low, all registers in the
device are cleared. When output enable G is held
high, all data in the output buffers is held low and
all drain outputs are off. When G is held low, data
from the storage register is transparent to the output
buffers. The serial output (SER OUT) is clocked out
of the device on the falling edge of SRCK to provide
additional hold time for cascaded applications. This
will provide improved performance for applications
where clock signals may be skewed, devices are not
located near one another, or the system must tolerate
electromagnetic interference.
Outputs are low-side, open-drain DMOS transistors
with output ratings of 50V and a 350mA continuous
sink current capability. When data in the output buffers
is low, the DMOS-transistor outputs are off. When
data is high, the DMOS-transistor outputs have sink
current capability.
Separate power ground (PGND) and logic ground
(LGND) terminals are provided to facilitate maximum
system flexibility. All PGND terminals are internally
connected, and each PGND terminal must be
externally connected to the power system ground
to minimize parasitic impedance. A single-point
connection between LGND and PGND must be made
externally in a manner that reduces crosstalk between
the logic and load circuits.
The TPIC6A596 is offered in a thermally-enhanced
dual-in-line (NE) package and a wide-body
surface-mount (DW) package. The TPIC6A596 is
characterized for operation over the operating case
temperature range of −40°C to 125°C.