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74LVC1G175DBVRG4 데이터시트 (PDF) - Texas Instruments

74LVC1G175DBVRG4 Datasheet PDF - Texas Instruments
부품명 74LVC1G175DBVRG4
다운로드  74LVC1G175DBVRG4 다운로드
파일 크기   1794.12 Kbytes
페이지   32 Pages
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments
상세설명 SN74LVC1G175 Single D-Type Flip-Flop With Asynchronous Clear

74LVC1G175DBVRG4 Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
74LVC1G175DBVRG4 Datasheet PDF - Texas Instruments

부품명 74LVC1G175DBVRG4
다운로드  74LVC1G175DBVRG4 Click to download

파일 크기   1794.12 Kbytes
페이지   32 Pages
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments
상세설명 SN74LVC1G175 Single D-Type Flip-Flop With Asynchronous Clear

74LVC1G175DBVRG4 데이터시트 (HTML) - Texas Instruments


74LVC1G175DBVRG4 제품 세부 정보

1 Features
1• Available in the Texas Instruments
NanoFree™ Package
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Supports Down Translation to VCC
• Max tpd of 4.3 ns at 3.3 V
• Low Power Consumption, 10-μA Max ICC
• ±24-mA Output Drive at 3.3 V
• Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

2 Applications
• TV/Set Top Box/Audio
• EPOS (Electronic Point-of-Sale)
• Motor Drives
• PC/Notebook
• Servers
• Factory Automation and Control
• Tablets
• Medical Healthcare and Fitness
• Smart Grid
• Telecom Infrastructure
• Enterprise Switching
• Projectors
• Storage

3 Description
This single D-type flip-flop is designed for 1.65-V to
5.5-V VCC operation.
The SN74LVC1G175 device has an asynchronous
clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on
the clock's (CLK) rising edge. When CLR is low, Q is
forced into the low state, regardless of the clock edge
or data on D.
NanoFree™ package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.




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