 Integrated 25MHz crystal
 Flexible 1.8V, 2.5V, 3.3V power rails
 High-performance, low phase noise PLL, < 0.5ps RMS typical phase jitter on outputs
 Four banks of internal OTP memory
• In-system or factory programmable
• Two select pins accessible with processor GPIOs or bootstrapping
 I2C serial programming interface
• 0xD0 or 0xD4 I2C address options allow multiple devices configured in a same system
 Reference LVCMOS output clock
 Four universal output pairs individually configurable:
• Differential (LVPECL, LVDS, or HCSL)
• Two single-ended (2 LVCMOS in-phase or 180 degrees out of phase)
• I/O VDDs can be mixed and matched, supporting 1.8V (LVDS and LVCMOS), 2.5V, or 3.3V
• Independent spread spectrum on each output pair
 Output frequency ranges:
• LVCMOS clock outputs: 1kHz to 200MHz
• LVDS, LVPECL, HCSL differential clock outputs: 1kHz to 350MHz
 Programmable output enable or power-down mode
 Available in 4 × 4 mm 24-LGA package
 -40° to +85°C industrial temperature operation