Description
. HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V . LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C . COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH = tPHL . PIN AND FUNCTION COMPATIBLE WITH 54/74LS139 The M54/74HCT139 is a high speed CMOS DUAL TWO LINE TO FOUR LINE DECODER/DEMULTIPLEXER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The activelow enable input can beused for gating or as a data input for demultiplexing applications. While theenable input is held high, all four outputs are high independently of the other inputs. All inputs are equipped with protection circuits against staticdischarge and transient excessvolt-age.This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for 1/9