1 Features
• ADC core:
– 12-bit resolution
– Up to 10.4GSPS in single-channel mode
– Up to 5.2GSPS in dual-channel mode
• Performance specifications:
– Noise floor (–20dBFS, VFS = 1VPP-DIFF):
• Dual-channel mode: –151.8dBFS/Hz
• Single-channel mode: –154.4dBFS/Hz
– ENOB (dual channel, FIN = 2.4GHz): 8.6 Bits
• Buffered analog inputs with VCMI of 0V:
– Analog input bandwidth (–3dB): 8GHz
– Usable input frequency range: > 10GHz
– Full-scale input voltage (VFS, default): 0.8VPP
• Noiseless aperture delay (tAD) adjustment:
– Precise sampling control: 19fs Step
– Simplifies synchronization and interleaving
– Temperature and voltage invariant delays
• Easy-to-use synchronization features:
– Automatic SYSREF timing calibration
– Timestamp for sample marking
• JESD204C serial data interface:
– Maximum lane rate: 17.16Gbps
– Support for 64b/66b and 8b/10b encoding
– 8b/10b modes are JESD204B compatible
• Optional digital down-converters (DDC):
– 4x, 8x, 16x and 32x complex decimation
– Four independent 32-Bit NCOs per DDC
• Peak RF Input Power (Diff): +26.5dBm (+27.5dBFS, 560x fullscale power)
• Programmable FIR filter for equalization
• Power consumption: 4W
• Power supplies: 1.1V, 1.9V