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SG3525AP 데이터시트 (PDF) - STMicroelectronics

SG3525AP Datasheet PDF - STMicroelectronics
부품명 SG3525AP
다운로드  SG3525AP 다운로드
파일 크기   117.88 Kbytes
페이지   12 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 REGULATING PULSE WIDTH MODULATORS

SG3525AP Datasheet (PDF)

Go To PDF Page 다운로드 데이터시트
SG3525AP Datasheet PDF - STMicroelectronics

부품명 SG3525AP
다운로드  SG3525AP Click to download

파일 크기   117.88 Kbytes
페이지   12 Pages
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics
상세설명 REGULATING PULSE WIDTH MODULATORS

SG3525AP 데이터시트 (HTML) - STMicroelectronics


SG3525AP 제품 세부 정보

DESCRIPTION
The SG3525Aseries of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip + 5.1 V reference is trimmed to ± 1 % and the input common-mode range of the error amplifier includes the reference voltage eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the CT and the discharge terminals provide a wide range of dead time adjustment. These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuity and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands. These functions are also controlled by an under voltage lockout which keeps the outputs off and the soft-start capacitor discharged for sub-normal input voltages. This lockout circuitry includesapproximately500 mV of hysteresis for jitter free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulses has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200 mA. The SG3525AoutputstagefeaturesNOR logic, giving a LOW output for an OFF state.

■ 8 TO 35 V OPERATION
■ 5.1 V REFERENCE TRIMMED TO ± 1 %
■ 100 Hz TO 500 KHz OSCILLATORRANGE
■ SEPARATE OSCILLATORSYNC TERMINAL
■ ADJUSTABLE DEADTIME CONTROL
■ INTERNAL SOFT-START
■ PULSE-BY-PULSESHUTDOWN
■ INPUT UNDERVOLTAGE LOCKOUT WITH HYSTERESIS
■ LATCHING PWM TO PREVENT MULTIPLE PULSES
■ DUAL SOURCE/SINK OUTPUT DRIVERS




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