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LPC1752FBD80K 데이터시트 (PDF) - NXP Semiconductors

LPC1752FBD80K Datasheet PDF - NXP Semiconductors
부품명 LPC1752FBD80K
다운로드  LPC1752FBD80K 다운로드
파일 크기   2100.09 Kbytes
페이지   80 Pages
제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors
상세설명 USB 2.0 Host/Device/OTG, CAN

LPC1752FBD80K Datasheet (PDF)

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LPC1752FBD80K Datasheet PDF - NXP Semiconductors

부품명 LPC1752FBD80K
다운로드  LPC1752FBD80K Click to download

파일 크기   2100.09 Kbytes
페이지   80 Pages
제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors
상세설명 USB 2.0 Host/Device/OTG, CAN

LPC1752FBD80K 데이터시트 (HTML) - NXP Semiconductors


LPC1752FBD80K 제품 세부 정보

General description
The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded
applications featuring a high level of integration and low power consumption. The ARM
Cortex-M3 is a next generation core that offers system enhancements such as enhanced
debug features and a higher level of support block integration.
The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The
LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU
incorporates a 3-stage pipeline and uses a Harvard architecture with separate local
instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3
CPU also includes an internal prefetch unit that supports speculative branching.
The peripheral complement of the LPC1759/58/56/54/52/51 includes up to 512 kB of flash
memory, up to 64 kB of data memory, Ethernet MAC, USB Device/Host/OTG interface,
8-channel general purpose DMA controller, 4 UARTs, 2 CAN channels, 2 SSP controllers,
SPI interface, 2 I2C-bus interfaces, 2-input plus 2-output I2S-bus interface, 6 channel
12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder interface, 4 general
purpose timers, 6-output general purpose PWM, ultra-low power Real-Time Clock (RTC)
with separate battery supply, and up to 52 general purpose I/O pins.
For additional documentation, see Section 19 “References”.
Features and benefits
 ARM Cortex-M3 processor, running at frequencies of up to 100 MHz
(LPC1758/56/57/54/52/51) or of up to 120 MHz (LPC1759). A Memory Protection Unit
(MPU) supporting eight regions is included.
 ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
 Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator
enables high-speed 120 MHz operation with zero wait states.
 In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
 On-chip SRAM includes:
 Up to 32 kB of SRAM on the CPU with local code/data bus for high-performance
CPU access.
 Two/one 16 kB SRAM blocks with separate access paths for higher throughput.
These SRAM blocks may be used for Ethernet (LPC1758 only), USB, and DMA
memory, as well as for general purpose CPU instruction and data storage.
Applications
 eMetering
 Lighting
 Industrial networking
 Alarm systems
 White goods
 Motor control




유사한 부품 번호 - LPC1752FBD80K

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LPC1752FBD80 NXP-LPC1752FBD80 Datasheet
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LPC1752FBD80 NXP-LPC1752FBD80 Datasheet
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유사한 설명 - LPC1752FBD80K

제조업체부품명데이터시트상세설명
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LPC2460 PHILIPS-LPC2460_08 Datasheet
363Kb / 68P
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Rev. 02-1 February 2008
LPC2420 NXP-LPC2420_09 Datasheet
1Mb / 78P
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
Rev. 04-15 October 2009
LPC2470 NXP-LPC2470 Datasheet
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Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG, external memory interface
Rev. 02-15 October 2009
LPC2420 NXP-LPC2420_10 Datasheet
1Mb / 79P
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
Rev. 05-24 February 2010
LPC2470 NXP-LPC2470_11 Datasheet
696Kb / 89P
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG
Rev. 3-14 February 2011
LPC2470_1109 NXP-LPC2470_1109 Datasheet
800Kb / 91P
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG, external memory interface
Rev. 4-8 September 2011
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