General description
The NXP LPC8N04 is an IC optimized for an entry level Cortex-M0+ MCU with built-in
NFC interface. LPC8N04 supports an effective system solution with a minimal number of
external components for NFC related applications.
The embedded ARM Cortex-M0+ offers flexibility to the users of this IC to implement their
own dedicated solution. The LPC8N04 contains multiple features, including multiple
power-down modes and a selectable CPU frequency of up to 8 MHz, for ultra-low power
consumption.
Users can program this LPC8N04 with the industry-wide standard solutions for ARM
Cortex-M0+ processors.
Features and benefits
 System
 ARM Cortex-M0+ processor running at frequencies of up to 8 MHz
 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
 ARM Serial Wire Debug (SWD)
 System tick timer
 IC reset input
 Memory
 32 kB on-chip flash programming memory
 4 kB on-chip EEPROM of which 256 byte can be write protected
 8 kB SRAM
 Digital peripherals
 Up to 12 General Purpose Input Output (GPIO) pins with configurable
pull-up/pull-down resistors and repeater mode
 GPIO pins which can be used as edge and level sensitive interrupt sources
 High-current drivers/sinks (20 mA) on four GPIO pins
 High-current drivers/sinks (20 mA) on two I2C-bus pins
 Programmable WatchDog Timer (WDT)
 Analog peripherals
 Temperature sensor with 1.5 C absolute temperature accuracy between 40 C
and +85 C
 Communication interfaces
 NFC/RFID ISO 14443 type A interface
 I2C-bus interface supporting full I2C-bus specification and fast mode with a data
rate of 400 kbit/s, with multiple address recognition and monitor mode
 Energy harvesting functionality to power the LPC8N04.
 Clock generation
 8 MHz internal RC oscillator, trimmed to 2 % accuracy, which is used for the
system clock
 Timer oscillator operating at 32 kHz linked to the RTC timer unit
 Power control
 Support for 1.72 V to 3.6 V external voltages
 The LPC8N04 can also be powered from the NFC field
 Activation via NFC possible
 Integrated Power Management Unit (PMU) for versatile control of power
consumption
 Four reduced power modes for ARM Cortex-M0+: sleep, deep sleep, deep
power-down and battery off
 Power gating for each analog peripheral for ultra-low power operation
 < 50 nA IC current consumption in battery off mode at 3.0 V
 Power-On Reset (POR)
 Unique device serial number for identification
Applications
 Configurable LED strip/christmas tree LEDs via NFC
 Smart toy/interactive robot data logger
 Buttonless/contactless control panel
 Contactless diagnostic
 NFC e-locker
 Smart manufacturing
 NFC OTA