The M65762FP is a compression and decompression LSI conforming to the high efficiency encoding system (QM-Coder) in the International Standard, the JBIG/JPEG (ITU-T Recommendations T.81 and T.82) for coding still images. It also conforms to the International Standard (ITU-T Recommendation T.85) for facsimile.
• Completely conforms to the International Standard (ITU-T T.85) for facsimile.
• Achieves encoding/decoding with the arithmetic coder (QM-Coder) conforming to the recommendation of the International Standard JBIG/JPEG.
• Is expected to conform to the International Standard for color facsimile (T. Palette-colour).
• High speed processing that puts into effect coding and decoding at 40 million pixels per second maximum.
• Is possible data-through processing without coding and decoding.
• Can select context
- Provides 10 pixel template model for minimum resolution conforming to JBIG and can select 2-line or 3-line template model.
• Built-in typical prediction function
- Capable of coding and decoding by using the typical prediction.
- Since use of the typical prediction does not require the processing of the line (TP line) which is matched the previous lines data, is capable of reducing data and processing time.
• Built-in adaptive template (AT) function
- Is capable of setting AT pixels before 127 pixels on the coding line.
- Since it is possible to change the position of AT pixel in a specified line, is capable of improving compression characteristics even when image characteristic is changed in the middle of the screen.
• Supporting multi-stripe
- When a page consists of more than one stripe, is capable of repeating encoding/decoding process in stripes.
• Built-in load/store function of line memory → Supporting multiple planes and multi-stripe function
- Is capable of loading image data for reference line from outside to line memory of the LSI and storing image data from line memory to outside.
• Number of processing lines
- Is capable of issuing the start of processing (temporary stop command) several times to encode/decode any lines more than or equal to 65535 lines.
• Supporting 3-bus interface
- An 8-bit host bus corresponds to the MPU is available to load and store of context table RAM.
- For input/output of binary image data, is capable of performing 32-bit or 16-bit parallel or serial input/output.
- For input/output of coding data, is capable of selecting 32-bit /16-bit/8-bit bus to perform DMA transfer of coding data.
• Is capable of making scale-down for coding and scale-up for decoding.
• Is capable of setting marker code for coding and detecting marker code for decoding
• Built-in RAM for 4096 bytes for line memory, built-in context table RAM and built-in probability estimation table ROM of 113 status
• +5 V single power supply
• OA equipment including facsimile, copier and printer
• Digital and amusement equipment for the purpose of reducing memory