Description
These bus transceivers are designed for a synchronous three-way communication between four-line data buses. They give the designer a choice of selecting inverting, noninverting or a combination of inverting and noninverting data paths with 3-state outputs.

Features
• High Speed Operation
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)