Dual JK Flip-Flop With Set and Reset
High–Performance Silicon–Gate CMOS

The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
Each flip–flop is negative–edge clocked and has active–low asynchronous Set and Reset inputs.
The HC76 is identical in function to the HC112, but has a different pinout.

• Similar in Function to the LS76 Except When Set and Reset Are Low Simultaneously
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6V
• Low Input Current: 1µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 100 FETs or 25 Equivalent Gates