The HYM 321000S/GS-50/-60 is a 4 MByte DRAM module organized as 1 048 576 words by 32- bit in a 72-pin single-in-line package comprising two HYB 5118160BSJ 1M × 16 DRAMs in 400 mil wide SOJ-packages mounted together with two 0.2 µF ceramic decoupling capacitors on a PC board.

Advanced Information
• 1 048 576 words by 32-bit organization (alternative 2 097 152 words by 16-bit)
• Fast access and cycle time 50 ns access time 90 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version)
• Fast page mode capability with 35 ns cycle time (-50 version) 40 ns cycle time (-60 version)
• Single + 5 V (± 10 %) supply
• Low power dissipation max 2200 mW active (-50 version) max. 1980 mW active (-60 version) CMOS – 11 mW standby TTL – 22 mW standby
• CAS-before-RAS refresh, RAS-only-refresh, Hidden refresh
• 2 decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully TTL compatible
• 72 pin Single in-Line Memory Module
• Utilizes two 1M × 16 -DRAMs in SOJ-42 packages
• 1024 refresh cycles/16 ms
• Optimized for use in byte-write non-parity applications
• Tin-Lead contact pads HYM 321000S
• Gold-Lead contact pads HYM 321000GS
• single sided module with 20.32 mm (800 mil) height