16-Bit Single-Chip Microcontroller C166 Family

C165
• High Performance 16-bit CPU with 4-Stage Pipeline
    – 80 ns Instruction Cycle Time at 25 MHz CPU Clock
    – 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
    – Enhanced Boolean Bit Manipulation Facilities
    – Additional Instructions to Support HLL and Operating Systems
    – Register-Based Design with Multiple Variable Register Banks
    – Single-Cycle Context Switching Support
    – 16 MBytes Total Linear Address Space for Code and Data
    – 1024 Bytes On-Chip Special Function Register Area
• 16-Priority-Level Interrupt System with 28 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
• Clock Generation via prescaler or via direct clock input
• On-Chip Memory Modules
    – 2 KBytes On-Chip Internal RAM (IRAM)
• On-Chip Peripheral Modules
    – Two Multi-Functional General Purpose Timer Units with 5 Timers
    – Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
• Up to 16 MBytes External Address Space for Code and Data
    – Programmable External Bus Characteristics for Different Address Ranges
    – Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit Data Bus Width
    – Five Programmable Chip-Select Signals
    – Hold- and Hold-Acknowledge Bus Arbitration Support
• Idle and Power Down Modes
• Programmable Watchdog Timer
• Up to 77 General Purpose I/O Lines, partly with Selectable Input Thresholds and Hysteresis
• Power Supply: the C165 can operate from a 5 V or a 3 V power supply
• Supported by a Large Range of Development Tools like C-Compilers, Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards
• On-Chip Bootstrap Loader
• 100-Pin MQFP Package (0.65 mm pitch)
• 100-Pin TQFP Package (0.5 mm pitch)