GENERAL DESCRIPTION
The K4S561633F is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FEATURES
• 3.0V & 3.3V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
   -. CAS latency (1, 2 & 3).
   -. Burst length (1, 2, 4, 8 & Full page).
   -. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system clock
• Burst read single-bit write operation.
• Special Function Support.
   -. PASR (Partial Array Self Refresh).
   -. Internal TCSR (Temperature Compensated Self Refresh)
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25°C ~ 70°C).
• Extended Temperature Operation (-25°C ~ 85°C).
• 54Balls BOC with 0.8mm ball pitch
   ( -X : Leaded, -Z : Lead Free).