Integrated Portable System Processor—DragonBall™

As the portable consumer market grows in full speed, the system requirements are becoming more rigorous than ever. Minimum components, small board space, low power consumption, and low system cost are several minimum criteria to a successful product. To address these needs, Motorola designed a new processor MC68328 DragonBallTM. By providing 3.3V, fully static operation in an efficient package, the MC68328 delivers cost-effective performance to satisfy the extensive requirements of today’s portable consumer market.

KEY FEATURES
The primary features of the MC68328 are as follows:
• Static 68EC000 Core Processor—Identical to MC68EC000 Microprocessor
   — Full Compatibility With MC68000 And MC68EC000
   — 32-Bit both External and Internal Address Bus capable of addressing 4GB Space
   — 16-Bit On-Chip Data Bus For MC68000 Bus Operations
   — Static Design Allows Processor Clock To Be Stopped Providing Dramatic Power Savings
   — 2.7 MIPS Performance At 16.67-MHz Processor Clock
• External M68000 Bus Interface with Dynamic Bus Sizing for 8-bit and 16-bit Data Ports
• System Integration Module (SIM28), Incorporating Many Functions Typically Relegated to External Array
   Logic, such as:
   — System Configuration, Programmable Address Mapping
   — Glueless Interface to SRAM, EPROM, FLASH Memory
   — Sixteen Programmable Peripheral Chip Selects With Wait State Generation Logic
   — Interrupt Controller with 13 flexible inputs
   — Programmable Interrupt Vector Response For On-Chip Peripheral Modules
   — Hardware Watchdog Timer
   — Software Watchdog Timer
   — Low-Power Mode Control
   — Up to 78-Bit Individually Programmable Parallel I/O Ports
   — PCMCIA 1.0 Support
• UART
   — Support IrDA Physical Layer Protocol
   — 8 Bytes FIFO on Rx and Tx
• Two Separated Serial Peripheral Interface Ports (Master and Slave)
   — Support For External POCSAG Decoder (Slave)
   — Support for Digitizer from A/D Input or EEPROM (Master)
• Dual Channel 16-Bit General Purpose Counter/timer
   — Multimode Operation, Independent Capture/Compare Registers
   — Automatic Interrupt Generation
   — 240-ns Resolution At 16.67-MHz System Clock
   — Each Timer Has An Input And An Output Pin for Capture and Compare
• Pulse Width Modulation Output For Sound Generation
   — Programmable Frame rate
   — 16 Bit programmable
   — Supports Motor Control
• Real Time Clock
   — 24 Hour Time
   — One Programmable Alarm
• Power Management
   — 5 V or 3.3 V Operation
   — Fully Static HCMOS Technology
   — Programmable Clock Synthesizer for Full Frequency Control
— Low Power Stop Capabilities
— Modules Can Be Individually Shut-down
— Lowest Power Mode Control (Shut Down CPU and Peripherals)
• LCD Control Module
— Software Programmable Screen Size To Support Single (Non-Split) Monochrome/ STN Panels
— Capable Of Direct Driving Popular LCD Drivers/Modules From Motorola, Sharp, Hitachi, Toshiba etc.
— Support Up To 4 Grey Levels
— Utilize System Memory as Display Memory
• IEEE 1149.1 Boundary Scan Test Access Port (JTAG)
• Operation From DC To 16.67 MHz (Processor Clock)
• Operating Voltages of 3.3V ± 0.3V and 5V ± 0.5V
• Compact 144-Lead Thin Quad Flat Pack (TQFP) Package