Features
■ Core: ARM® 32-bit Cortex®-M0 CPU, frequency up to 48 MHz
■ Memories – 32 Kbytes of Flash memory – 6 Kbytes of SRAM with HW parity
■ CRC calculation unit
■ Power management – Digital and I/Os supply: VDD = 1.8 V ± 8% – Analog supply: VDDA = from VDD to 3.6 V – Selected I/Os: VDDIO2 = 1.65 V to 3.6 V – Low power modes: Sleep, Stop – VBAT supply for RTC and backup registers
■ Clock management – 4 to 32 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x6 PLL option – Internal 40 kHz RC oscillator – Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
■ Up to 37 fast I/Os – All mappable on external interrupt vectors – Up to 24 I/Os with 5 V tolerant capability and 8 with independent supply VDDIO2
■ 5-channel DMA controller
■ One 12-bit, 1.0 µs ADC (10 channels) – Conversion range: 0 to 3.6 V – Separate analog supply: 2.4 V to 3.6 V
■ Up to 13 capacitive sensing channels for touchkey, linear and rotary touch sensors
■ Calendar RTC with alarm and periodic wakeup from Stop
■ Nine timers – One 16-bit advanced-control timer for six channel PWM output – One 32-bit and four 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding – Independent and system watchdog timers – SysTick timer
■ Communication interfaces – One I2C interface supporting Fast Mode Plus (1 Mbit/s) with extra current sink, SMBus/PMBus and wakeup – Two USARTs supporting master synchronous SPI and modem control, one with ISO7816 interface, LIN, IrDA, auto baud rate detection and wakeup feature – Up to two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, one with I2S interface multiplexed – USB 2.0 full-speed interface, able to run from internal 48 MHz oscillator and with BCD and LPM support
■ HDMI CEC, wakeup on header reception
■ Serial wire debug (SWD)
■ 96-bit unique ID
■ All packages ECOPACK®2 UFQFPN48 7x7 mm WLCSP36 UFQFPN28 4x4 mm 2.6x2.7 mm