MRF89XA datasheet(36/140 Pages) MICROCHIP

36 / 140 page

MRF89XA

DS70000622D-page 36

Preliminary

 2010-2017 Microchip Technology Inc.

2.14.11

P2 COUNTER SET REGISTER DETAILS

P2CREG: P2 COUNTER SET REGISTER (ADDRESS:0x0A) (POR:0x62)

2.14.12

S2 COUNTER SET REGISTER DETAILS

S2CREG: S2 COUNTER SET REGISTER (ADDRESS:0x0B) (POR:0x32)

R/W-0

R/W-1

R/W-0

R/W-1

R/W-0

P2CVAL<7:0>

bit 7

bit 0

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

r = Reserved

bit 7-0

P2CVAL<7:0>: P2 Value bits

These bits indicate the value in P2 counter to generate carrier frequencies in FSK mode.

P2CVAL<7:0> = 0x62 (default)

P2CVAL is activated if RPS = 1 in GCONREG. Also, default values R2, P2, and S2 generate 920 MHz

in FSK Mode.

R/W-0

R/W-1

R/W-0

R/W-1

S2CVAL<7:0>

bit 7

bit 0

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

r = Reserved

bit 7-0

S2CVAL<7:0>: S2 Value bits

These bits indicate the value in S2 counter to generate carrier frequencies in FSK mode.

S2CVAL<7:0> = 0x32 (default).

S2CVAL is activated if RPS = 1 in GCONREG. Also, default values R2, P2, and S2 generate 920 MHz

in FSK Mode.

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