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SLG46580 데이터시트(PDF) 21 Page - Dialog Semiconductor

부품명 SLG46580
상세설명  Read Back Protection
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SLG46580/82/83_DS_062
Page 20 of 193
SLG46580/82/83
Preliminary
5.7 Counter/Delay Specifications
OSC Specifications
5.7.1 OSC Power On delay
Table 5. Typical Counter/Delay Offset.
Parameter
RC OSC
Freq
RC OSC Power
VDD = 2.5 V VDD = 3.3V VDD = 5.0V
Unit
offset
25kHz
auto
16
2.5
2.5
s
offset
2MHz
auto
1
0.6
0.4
s
offset
2kHz
auto
247
232
198
s
frequency settling time
25kHz
auto
16
14
12
s
frequency settling time
2MHz
auto
14
14
14
s
frequency settling time
2kHz
auto
250
200
150
s
variable (CLK period)
25kHz
forced
0-40
0-40
0-40
s
variable (CLK period)
2MHz
forced
0-0.5
0-0.5
0-0.5
s
variable (CLK period)
2kHz
forced
0-0.5
0-0.5
0-0.5
s
tpd (non-delayed edge)
25kHz/2MHz
either
25
14
10
ns
Table 6. Oscillators Power On delay at room temperature, DLY/CNT Counter data = 100; RC OSC power setting: "Auto
Power On", RC osc clock to matrix input: "Enable"
Power
Supply
Range
(VDD) V
Configurable
OSC 2 MHz
Configurable
OSC 25 kHz
Low Power
OSC
Typical
Value, µs
Maximum
Value, µs
Typical
Value, µs
Maximum
Value, µs
Typical
Value, µs
Maximum
Value, µs
2.30
0.65
0.95
14.79
19.47
216.39
285.27
2.50
0.59
0.86
14.13
19.14
211.10
282.30
2.70
0.55
0.79
13.44
28.32
206.05
279.48
3.00
0.49
0.71
3.21
35.05
198.88
275.01
3.30
0.45
0.65
1.61
16.23
191.87
272.35
3.60
0.42
0.60
1.62
2.29
185.12
268.96
4.20
0.37
0.53
1.70
2.50
172.07
262.31
4.50
0.35
0.50
1.74
2.58
165.94
259.51
5.00
0.33
0.46
1.80
2.65
157.57
252.63
5.50
0.31
0.43
1.80
2.60
154.01
242.82
Table 7. Oscillators Power On delay at room temperature, DLY/CNT Counter data = 100; RC OSC power setting: "Auto
Power On", RC osc clock to matrix input: "Enable", Fast Start-up Time Mode
Power
Supply
Range
(VDD) V
Configurable
OSC 2 MHz
Configurable
OSC 25 kHz
Typical
Value, µs
Maximum
Value, µs
Typical
Value, µs
Maximum
Value, µs
2.30
0.24
0.31
20.71
22.25
2.50
0.22
0.28
20.67
22.25
2.70
0.21
0.25
20.65
22.17
3.00
0.19
0.23
20.61
22.13



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