ST68C554 datasheet(14/40 Pages) EXAR

14 / 40 page

ST16C554/554D/68C554

Rev. 3.10

The generator divides the input 16X clock by any

divisor from 1 to 216 -1. The 554D divides the basic

crystal or external clock by 16. Further division of this

16X clock provides two table rates to support low and

high data rate applications using the same system

design. Customized Baud Rates can be achieved by

selecting the proper divisor values for the MSB and

LSB sections of baud rate generator.

Programming the Baud Rate Generator Registers

DLM (MSB) and DLL (LSB) provides a user capability

for selecting the desired final baud rate. The example

in Table 5 below, shows the two selectable baud rate

tables available when using a 7.3728 MHz crystal.

22pF

33pF

1.8432 MHz

Figure 8, Crystal oscillator connection

Table 5, BAUD RATE GENERATOR PROGRAMMING TABLE:

Output

User

DLM

DLL

Baud Rate

16 x Clock

Program

(1.8432 MHz (7.3728 MHz

Divisor

Value

Clock)

(Decimal)

(HEX)

200

2304

900

300

1200

384

180

600

2400

192

1200

4800

2400

9600

4800

19.2K

9600

38.4k

19.2k

76.8k

38.4k

153.6k

57.6k

230.4k

115.2k

460.8k

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