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HT66F019 데이터시트(PDF) 72 Page - Holtek Semiconductor Inc |
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HT66F019 데이터시트(HTML) 72 Page - Holtek Semiconductor Inc |
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72 / 175 page ![]() Rev. 1.00 �� De�e��e� 01� �01� Rev. 1.00 �3 De�e��e� 01� �01� HT66F019 A/D Flash MCU with EEPROM HT66F019 A/D Flash MCU with EEPROM Timer/Counter Mode Toselectthismode,bitsCTM1andCTM0intheCTMC1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheCTM outputpinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompare MatchOutputModecanbeusedtounderstanditsfunction.AstheCTMoutputpinisnotusedin thismode,thepincanbeusedasanormalI/Opinorotherpin-sharedfunctions. PWM Output Mode Toselectthismode,bitsCTM1andCTM0intheCTMC1registershouldbesetto10respectively. ThePWMfunctionwithintheCTMisusefulforapplicationswhichrequirefunctionssuchasmotor control,heatingcontrol,illuminationcontroletc.Byprovidingasignaloffixedfrequencybutof varyingdutycycleontheCTMoutputpin,asquarewaveACwaveformcanbegeneratedwith varyingequivalentDCRMSvalues. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMOutputMode,theCTCCLRbithasnoeffectonthe PWMoperation.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform, oneregisterisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency, whiletheotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleither frequencyordutycycleisdeterminedusingtheCTDPXbitintheCTMC1register.ThePWM waveformfrequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAand CCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.TheCTOCbitintheCTMC1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoCTIO1andCTIO0bitsareusedto enablethePWMoutputortoforcetheTMoutputpintoafixedhighorlowlevel.TheCTPOLbitis usedtoreversethepolarityofthePWMoutputwaveform. • 16-bit CTM, PWM Output Mode, Edge-aligned Mode, CTDPX = 0 CCRP 1~255 0 Pe�iod CCRP×�56 65536 Duty CCRA IffSYS=16MHz,CTMclocksourceselectfSYS/4,CCRP=2andCCRA=128, TheCTMPWMoutputfrequency=(fSYS/4)/(2×256)=fSYS/2048=7.8125kHz,duty=128/(2×256)=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. • 16-bit CTM, PWM Output Mode, Edge-aligned Mode, CTDPX = 1 CCRP 1~255 0 Pe�iod CCRA Duty CCRP×�56 65536 ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeCTMclock whilethePWMdutycycleisdefinedbytheCCRPregistervalueexceptwhentheCCRPvalueis equalto0. |
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