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HT67F370 데이터시트(PDF) 13 Page - Holtek Semiconductor Inc

부품명 HT67F370
상세설명  TinyPower A/D Flash MCU with LCD & EEPROM
PDF  225 Pages
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제조업체  HOLTEK [Holtek Semiconductor Inc]
홈페이지  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT67F370 데이터시트(HTML) 13 Page - Holtek Semiconductor Inc

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HT67F370
TinyPowerTM A/D Flash MCU with LCD & EEPROM
HT67F370
TinyPowerTM A/D Flash MCU with LCD & EEPROM
Pin Name
Function
OPT
I/T
O/T
Description
PD4/SEG4/PTP0
PD4
PDPU
PDFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG4
PDFS
SFSR
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PTP0
PDFS
SFSR
ST
CMOS PTM0 inp�t/o�tp�t
PD5/SEG5/PTP0B
PD5
PDPU
PDFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG5
PDFS
SFSR
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PTP0B
PDFS
SFSR
ST
CMOS PTM0 inp�t/inve�ted o�tp�t
PD�/SEG�/PTP1
PD�
PDPU
PDFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG�
PDFS
SFSR
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PTP1
PDFS
SFSR
ST
CMOS PTM1 inp�t/o�tp�t
PD�/SEG�/PTP1B
PD�
PDPU
PDFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG�
PDFS
SFSR
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PTP1B
PDFS
SFSR
ST
CMOS PTM1 inp�t/inve�ted o�tp�t
PE0/SEG8
PE0
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG8
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE1/SEG9
PE1
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG9
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE�/SEG10
PE�
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG10
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE3/SEG11
PE3
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG11
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE4/SEG1�
PE4
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG1�
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE5/SEG13
PE5
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG13
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE�/SEG14
PE�
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG14
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PE�/SEG15
PE�
PEPU
PEFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG15
PEFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment
PF0/SEG1�
PF0
PFPU
PFFS
ST
CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p.
SEG1�
PFFS
—
AN
LCD d�ive� o�tp�t fo� LCD panel segment



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