CS5323

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7

PACKAGE PIN DESCRIPTION

PACKAGE PIN #

20 Lead SO Wide

PIN SYMBOL

FUNCTION

1

A resistor from this pin to ground sets operating frequency

2

COMP

Output of the error amplifier and input for the PWM

comparators.

3

Voltage Feedback Pin. To use Adaptive Positioning, set the

4

Current sense output for adaptive voltage positioning (AVP).

The level of this pin above the DAC voltage is proportional to

set AVP or leave this pin open for no AVP.

5–7

CS1–CS3

Current sense inputs. Connect current sense network for the

corresponding phase to each CSx pin.

8

Reference for Current Sense Amplifiers. To balance input

offset voltages between the inverting and noninverting inputs

of the Current Sense Amplifiers, connect a resistor between

the value of the resistors connected to the CSx pins.

9

Sets the threshold for hiccup mode current limit. Connect to

reference through a resistive divider.

10

REF

Reference output. Decouple with 0.1

µF.

11–15

VID0–VID4

Voltage ID DAC inputs. These pins are internally pulled up to

3.3 V if left open.

16

Gnd

IC Gnd.

17–19

GATE1–3

GATE drive signal.

20

Power for IC.