5520-DS04-405-R datasheet(39/90 Pages) BOARDCOM

39 / 90 page

Preliminary Data Sheet

BCM5220

04/20/04

Broa d c om Co rp o r a t i o n

Document

5220-DS04-405-R

MII Status Register

Page 27

10BASE-T Half-Duplex Capability

The BCM5220 is capable of 10BASE-T half-duplex operation, and returns a 1 when bit 11 of the Status register is read.

Reserved Bits

Ignore the BCM5220 output when these bits are read.

Preamble Suppression

This bit is the only writable bit in the Status register. Setting this bit to a 1 allows subsequent MII management frames to be

accepted with or without the standard preamble pattern. When preamble suppression is enabled, only 2 preamble bits are

required between successive management commands, instead of the normal 32.

Auto-Negotiation Complete

Returns a 1 if auto-negotiation process has been completed and the contents of registers 4, 5, and 6 are valid.

Remote Fault

The PHY returns a 1 on bit 4 of the status register when its link partner has signalled a far-end fault condition. When a far-

end fault occurs, the bit is latched at 1 and remains so until the register is read and the remote fault condition has been

cleared.

Auto-Negotiation Capability

The BCM5220 is capable of performing IEEE auto-negotiation, and returns a 1 when bit 4 of the Status register is read,

regardless of whether the auto-negotiation function has been disabled.

Link Status

The BCM5220 returns a 1 on bit 2 of the Status register when the link state machine is in link pass, indicating that a valid

link has been established. Otherwise, it returns 0. When a link failure occurs after the link pass state has been entered, the

link status bit is etched at 0 and remains so until the bit is read. After the bit is read, it becomes 1 when the link pass state

is entered again.

Jabber Detect

10BASE-T operation only. The BCM5220 returns a 1 on bit 1 of the Status register if a jabber condition has been detected.

After the bit is read once, or if the chip is reset, it reverts to 0.

Extended Capability

The BCM5220 supports extended capability registers, and returns a 1 when bit 0 of the Status register is read. Several

extended registers have been implemented in the BCM5220, and their bit functions are defined later in this section.

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