5220-DS02-R datasheet(54/90 Pages) BOARDCOM

54 / 90 page

BCM5220

Preliminary Data Sheet

04/20/04

Broa d c om Co rp o r a t i o n

Page 42

100BASE-X Disconnect Counter

Document

5220-DS04-405-R

100BASE-X FALSE CARRIER SENSE COUNTER

False Carrier Sense Counter [7:0]

This counter increments each time the BCM5220 detects a false carrier on the receive input. This counter automatically

clears itself when read. When the counter reaches its maximum value, FFh, it stops counting False Carrier Sense Errors

until cleared.

100BASE-X DISCONNECT COUNTER

PTEST REGISTER

The bit description for the PTEST register is shown in Table 22.

Table 20: 100BASE-X False Carrier Sense Counter (Address 19d, 13h)

Bit

Name

R/W

Description

DEFAULT

15:8

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

R/W

Write as 0, ignore when read

00h

7:0

False Carrier Sense Counter

R/W

Number of false carrier sense events since last read

00h

Table 21: 100BASE-X Disconnect Counter (Address 20d, 14h)

Bit

Name

R/W

Description

DEFAULT

Reserveda

R/O

0 = Normal

Reserveda

R/O

0 = Normal

13:8

Reserveda

R/W

Write as 000010, Ignore when read

000010

7:0

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

R/W

Write as 00h, Ignore when read

00h

Notes: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after

read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

Table 22: PTEST Register (Address 10111b, 23d, 17h)

Bit

Name

R/W

Description

DEFAULT

15:0

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

Ignore when read

0000h

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