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CY7C1069G 데이터시트(PDF) 9 Page - Cypress Semiconductor

부품명 CY7C1069G
상세설명  16-Mbit (2M words 횞 8 bit) Static RAM with Error-Correcting Code (ECC)
PDF  20 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1069G 데이터시트(HTML) 9 Page - Cypress Semiconductor

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Document Number: 001-81539 Rev. *J
Page 9 of 20
CY7C1069G
CY7C1069GE
Data Retention Characteristics
Over the Operating Range of –40
C to 85 C
Parameter
Description
Conditions
Min
Max
Unit
VDR
VCC for data retention
–
1.0
–
V
ICCDR
Data retention current
VCC = VDR, CE > VCC – 0.2 V [13],
VIN > VCC – 0.2 V or VIN < 0.2 V
–30.0
mA
tCDR[14]
Chip deselect to data retention
time
–0
–
ns
tR[14, 15]
Operation recovery time
VCC > 2.2 V
10.0
–
ns
VCC < 2.2 V
15.0
–
ns
Data Retention Waveform
Figure 6. Data Retention Waveform [13]
tCDR
tR
VDR = 1.0 V
DATA RETENTION MODE
VCC(min)
VCC(min)
VCC
CE
Notes
13. For all dual chip enable devices, CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW,
CE is HIGH.
14. This parameter is guaranteed by design and is not tested.
15. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.) > 100 s.



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