| 전자부품 데이터시트 검색엔진 |
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AM29DS163D 데이터시트(PDF) 39 Page - Advanced Micro Devices |
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AM29DS163D 데이터시트(HTML) 39 Page - Advanced Micro Devices |
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39 / 50 page ![]() Am29DS163D 39 ADV ANCE I N FO RMAT I O N AC CHARACTERISTICS Erase and Program Operations Notes: 1. Not 100% tested. 2. See “Erase And Programming Performance” on page 48 for more information. Parameter 100 120 JEDEC Std Description Unit tAVAV tWC Write Cycle Time (Note 1) Min 100 120 ns tAVWL tAS Address Setup Time Min 0 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 ns tWLAX tAH Address Hold Time Min 50 ns tAHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns tDVWH tDS Data Setup Time Min 50 ns tWHDX tDH Data Hold Time Min 0 ns tOEPH Output Enable High during toggle bit polling Min 20 ns tGHWL tGHWL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tELWL tCS CE# Setup Time Min 0 ns tWHEH tCH CE# Hold Time Min 0 ns tWLWH tWP Write Pulse Width Min 50 ns tWHDL tWPH Write Pulse Width High Min 30 ns tSR/W Latency Between Read and Write Operations Min 0 ns tWHWH1 tWHWH1 Programming Operation (Note 2) Byte Typ 9 µs Word Typ 13 tWHWH1 tWHWH1 Accelerated Programming Operation, Word or Byte (Note 2) Typ 7 µs tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 2 sec tVCS VCC Setup Time (Note 1) Min 50 µs tRB Write Recovery Time from RY/BY# Min 0 ns tBUSY Program/Erase Valid to RY/BY# Delay Min 90 ns |
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