LTC1644IGN datasheet(11/24 Pages) LINER

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LTC1644

1644f

APPLICATIO S I FOR ATIO

Hot Circuit Insertion

When a circuit board is inserted into a live CompactPCI

(CPCI) slot, the supply bypass capacitors on the board can

draw huge supply transient currents from the CPCI power

bus as they charge up. The transient currents can cause

glitches on the power bus, causing other boards in the

system to reset.

The LTC1644 is designed to turn a board’s supply voltages

on and off in a controlled manner, allowing the board to be

safely inserted or removed from a live CPCI slot without

glitching the system power supplies. The chip also protects

the supplies from shorts, precharges the bus I/O pins during

insertion and extraction and monitors the supply voltages.

The LTC1644 is specifically designed for CPCI applica-

tions where the chip resides on the plug-in board.

LTC1644 Feature Summary

• Allows safe board insertion and removal from a CPCI

backplane.

• Controls all four CPCI supplies: –12V, 12V, 3.3V and 5V.

• Adjustable foldback current limit: an adjustable analog

current limit with a value that depends on the output

voltage. If the output is shorted to ground, the current

limit drops to keep power dissipation and supply glitches

to a minimum.

• 12V and –12V circuit breakers: if either supply remains

in current limit too long, the circuit breaker will trip, the

supplies are turned off and the FAULT pin is pulled low.

• Dual-level, adjustable 5V and 3.3V circuit breakers: if

either supply exceeds current limit for too long, the

circuit breaker will trip, the supplies will be turned off

and the FAULT pin will be asserted. In the event that

either supply exceeds 3 times the nominal current level,

all supplies will be turned off and the FAULT pin will be

asserted immediately.

• Current limit during power up: the supplies are allowed

to power up in current limit. This allows the chip to

power up boards with widely varying capacitive loads

without tripping the circuit breaker. The maximum

allowable power-up time is adjustable using the TIMER

pin.

• 12V and –12V power switches on chip.

• PWRGD output: monitors the voltage status of the four

supply voltages.

• PCI_RST# combined on-chip with HEALTHY# to create

LOCAL_PCI_RST# output. If HEALTHY# deasserts,

LOCAL_PCI_RST# is asserted independent of

PCI_RST#.

• Precharge output: on-chip reference and amplifier pro-

vide 1V for biasing bus I/O connector pins during CPCI

card insertion and extraction.

• Space saving 20-pin SSOP package.

CPCI Power Requirements

CPCI systems usually require four power rails: 5V, 3.3V,

12V and –12V. The tolerance of the supplies as measured

at the components on the plug-in card is summarized in

Table 1.

Table 1. Compact PCI Power Specifications

SUPPLY

TOLERANCE

MAX RIPPLE (P-P)

+5%/–3%

50mV

3.3V

+5%/–3%

50mV

12V

±5%

240mV

–12V

±5%

240mV

tOC Overcurrent Fault Detect

tSC Short-Circuit Fault Detect

TI I G DIAGRA S

V5VSENSE OR

V3VSENSE

5V OR 3.3V

FALL TIME

≤ 1µs

5VIN = 5V, 3VIN = 3.3V

FAULT

100mV

tOC

1644 TD01

1644 TD02

V5VSENSE OR

V3VSENSE

5V OR 3.3V

FAULT

200mV

tSC

FALL TIME

≤ 10ns

5VIN = 5V, 3VIN = 3.3V

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