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LP6283 데이터시트(PDF) 5 Page - Lowpower Semiconductor inc |
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LP6283 데이터시트(HTML) 5 Page - Lowpower Semiconductor inc |
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5 / 10 page ![]() LP6283–00 Version 0.0 Jul.-2016 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 10 Preliminary Datasheet LP6283 41 DRN GPM Discharge Pin. 42 SUPN VGL Charge-Pump Regulator Power Source. Bypass SUPN to GND with a ceramic capacitor. 43 DRVN VGL Charge-Pump Regulator Driver Output. 44 GND Analog Ground. 45 FBN VGL Charge-Pump Regulator Feedback Input. Connect to an external resistive voltage divider from the VGL to REF to set the output voltage. 46 REF Reference Output. Connect a ceramic capacitor between REF and GND. 47 LDO_FB Linear Regulator Feedback Input. Connect to an external resistive voltage divider from the LDO_O to GND to set the output voltage. 48 LDO_O Linear Regulator Output. Bypass LDO_O to GND with a capacitor. 49(EP) GND Exposed Pad. Connect EP to GND. |
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