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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATAR092 데이터시트(PDF) 39 Page - ATMEL Corporation |
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ATAR092 데이터시트(HTML) 39 Page - ATMEL Corporation |
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39 / 100 page  39 ATAR092/ATAR892 4535C–4BMCU–02/04 Timer 2 Output Mode 5 Manchester Modulator: Timer 2 Modulates the SSI internal data output (SO) to Manchester code Figure 41. Manchester Modulation Timer 2 Output Mode 7 PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O) In this mode the timer overflow defines the period and the compare register defines the duty cycle. During one period only the first compare match occurrence is used to toggle the timer output flip-flop, until the overflow all further compare match are ignored. This avoids the situation that changing the compare register causes the occurrence of sev- eral compare match during one period. The resolution at the pulse-width modulation Timer 2 mode 1 is 12-bit and all other Timer 2 modes are 8-bit. Figure 42. PWM Modulation TOG2 SC SO T2O 00 0 00 11 01 01 11 1 1 8-bit SR Data Bit 7 Bit 0 0 Bit 7 Bit 0 Data: 00110101 0 0 50 255 100 0 255 0 150 255 0 50 255 0 100 T2R Input clock Counter 2/2 Counter 2/2 OVF2 CM2 INT4 T2O load the next compare value T2CO2 = 150 load load T1 T2 T3 T1 T2 TT T T T |
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