S29GL01GP datasheet(21/82 Pages) CYPRESS

부품명	S29GL01GP

상세설명	1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology

PDF	82 Pages

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제조업체	CYPRESS [Cypress Semiconductor]

홈페이지	http://www.cypress.com

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21 / 82 page

Document Number: 002-00886 Rev. *B

Page 21 of 83

S29GL01GP

S29GL512P

S29GL256P

S29GL128P

Figure 7.1

Single Word Program

Software Functions and Sample Code

Note

Base = Base Address.

Single Word/Byte Program

(LLD Function = lld_ProgramCmd)

Cycle

Operation

Byte Address

Word Address

Data

Unlock Cycle 1

Write

Base + AAAh

Base + 555h

00AAh

Unlock Cycle 2

Write

Base + 555h

Base + 2AAh

0055h

Program Setup

Write

Base + AAAh

Base + 555h

00A0h

Program

Write

Byte Address

Word Address

Data

Write Unlock Cycles:

Address 555h, Data AAh

Address 2AAh, Data 55h

Write Program Command:

Address 555h, Data A0h

Program Data to Address:

PA, PD

Unlock Cycle 1

Unlock Cycle 2

Setup Command

Program Address (PA),

Program Data (PD)

FAIL. Issue reset command

to return to read array mode.

Perform Polling Algorithm

(see Write Operation Status

flowchart)

Yes

Polling Status

= Busy?

Polling Status

= Done?

Error condition

(Exceeded Timing Limits)

PASS. Device is in

read mode.

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