MP8868 – SYNCHRONOUS STEP-DOWN CONVERTER

MP8868 Rev.1.1

www.MonolithicPower.com

6

5/15/2015

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I/O Level Characteristics

HS-Mode

LS-Mode

Parameter

Symbol

Condition

Min

Max

Min

Max

Units

Low-level input voltage

-0.5

0.3

-0.5

0.3V

Bus

V

High-level input voltage

0.7

0.5

0.7

0.5

V

0.05V

Bus

-

0.05

-

Hysteresis of Schmitt trigger

inputs

0.1

-

0.1

-

V

0

0.4

0

0.4

Low-level output voltage(Open

drain) at 3mA sink current

0

0.2

0

us

V

Low-level output current

-

3

-

3

mA

Transfer gate on resistance for

currents between SDA and

SCAH, or SCL and SCLH

VOL level, IOL=3mA

-

50

-

50

Ω

Transfer gate on resistance

between SDA and SCAH, or

SCL and SCLH

Both signals (SDA and SDAH,

or SCL and SCLH) at VBus

level

50

-

50

-

kΩ

Pull-up current of the SCLH

current source

SCLH output levels between

2

6

2

6

mA

Output rise time (current source

enabled) with an external pull-

up current source of 3mA

Capacitive load from 10pF to

100pF

10

40

ns

Rise time of the SCLH or SCL

signal

Capacitive load of 400pF

20

80

ns

Output fall time (current source

enabled) with an external pull-

up current source of 3mA

Capacitive load from 10pF to

100pF

10

40

ns

Fall time of the SCLH or SCL

signal

Capacitive load of 400pF

20

80

20

250

ns

Capacitive load from 10pF to

100pF

10

80

-

-

ns

Rise time of SDAH signal

Capacitive load of 400pF

20

160

20

250

ns

Capacitive load from 10pF to

100pF

10

80

-

-

ns

Fall time of SDAH signal

Capacitive load of 400pF

20

160

20

250

ns

Pulse width of spikes that must

be suppressed by the input filter

0

10

0

50

ns

Input current each I/O pin

-

10

-10

+10

uA

Capacitance for each I/O pin

-

10

-

10

pF

Notes: