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MPQ8632 데이터시트(PDF) 12 Page - Monolithic Power Systems |
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MPQ8632 데이터시트(HTML) 12 Page - Monolithic Power Systems |
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12 / 47 page ![]() MPQ8632 HIGH EFFICIENCY 18V SYNCHRONOUS STEP-DOWN CONVERTER FAMILY FOR 4A TO 20A MPQ8632 Rev.1.26 www.MonolithicPower.com 12 6/7/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. MPQ8632GVE-15, MPQ8632GVE-20 PIN # Name Description 1 EN Enable. Digital input that turns the regulator on or off. Drive EN high to turn on the regulator; drive it low to turn it off. Connect EN to IN through a pull-up resistor or a resistive voltage divider for automatic startup. Do not float this pin. 2 FREQ Frequency Set. Require a resistor connected between FREQ and IN to set the switching frequency. The input voltage and the resistor connected to the FREQ pin determine the ON time. The connection to the IN pin provides line feed-forward and stabilizes the frequency during input voltage’s variation. 3 FB Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. Place the resistor divider as close to FB pin as possible. Avoid using vias on the FB traces. 4 SS Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. 5 AGND Analog Ground. The control circuit reference. 6 PG Power-Good. The output is an open drain signal. Requires a 100kΩ typical pull-up resistor to a DC voltage to indicate HIGH if the output voltage exceeds 90% of the nominal voltage. Recommend a 10nF capacitor from PG to GND when the PG pull up resistor is <100kΩ. There is a delay from FB ≥ 90% to when PG goes high. 7 VCC Internal 4.8V LDO Output. Powers the driver and control circuits. 5V external bias can disable the internal LDO. Decouple with a ≥1µF ceramic capacitor as close to the pin as possible. For best results, use X7R or X5R dielectric ceramic capacitors for their stable temperature characteristics. 8 BST Bootstrap. Require a capacitor connected between SW and BST pins to form a floating supply across the high-side switch driver. 15-18, 25-29 SW Switch Output. Connect to the inductor and bootstrap capacitor. The high-side switch drives these pins up to VIN during the PWM duty cycle’s ON time. The inductor current drives the SW pin negative during the OFF-time. The low-side switch’s ON- resistance and the internal Schottky diode holds the negative voltage. Connect all SW pins using wide PCB traces. 10-14, 19-23 PGND System Ground. Reference ground of the regulated output voltage. PCB layout requires extra care. Connect using wide PCB traces. 9, 24 IN Supply Voltage. Supplies power to the internal MOSFET and regulator. The MPQ8632GVE operate from a 4.5V-to-18V input rail. If 5V external bias is tied to VCC pin, the input voltage can be low as 2.5V. Requires an input decoupling capacitor. Connect using wide PCB traces and multiple vias. |
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