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MP4050GS 데이터시트(PDF) 16 Page - Monolithic Power Systems

부품명 MP4050GS
상세설명  Non-Isolated, High Brightness, LED Driver
PDF  21 Pages
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제조업체  MPS [Monolithic Power Systems]
홈페이지  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP4050GS 데이터시트(HTML) 16 Page - Monolithic Power Systems

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MP4050 – NON-ISOLATED, HIGH BRIGHTNESS, LED DRIVER
MP4050 Rev.1.02
www.MonolithicPower.com
16
1/18/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
Table 1: Recommended input capacitance
Surge
voltage
500V
1000V
1500V
2000V
C2
3.3μF
4.7μF
4.7μF
C3
3.3μF
4.7μF
10μF
Show in
Figure11
The demo board can pass the 2000V
differential surge test by adopting below circuit
setup.
(1) Add a MOV RV1(TVR14431)
(2) Add a fuse F1 (SS-5-2A)
1mH/0.1A
L1
4.7
400V
C3
4.7
400V
C2
10/1W
FR1
L
N
MB6S
600V/0.5A
BD1
TVR14431
RV1
F1 250V/2A
85~265VAC
Figure11: 2kV surge solution
Layout Guide
PCB layout is very important to achieve reliable
operation,
good
EMI
and
good
thermal
performance especially in very small size LED
application. The following describe some layout
recommendations.
1. The loop formed between the MP4050,
inductor, freewheeling diode and output
capacitor should be kept as small as
possible for better EMI.
2. Put the AC input far away from the switching
nodes to minimize the noise coupling that
may bypass the input filter.
3. The VCC pin and PRO pin capacitor should
be located physically close to the IC and
GND.
4. Put the feedback resistor next to the PRO
pin as possible and minimize the feedback
sampling loop to minimize the noise coupling
route.
5. In the buck topology, since the MP4050
SOURCE pin is switching nodes, the copper
area connected to SOURCE should be
minimize to minimize EMI with the thermal
constraints of the design.
6. Since MP4050 DRAIN pin is static node
connecting to DC input, the copper area
connected to DRAIN could be maximized to
improve the heat sinking.
Figure 12 shows a sample layout.
Top Layer
Bottom Layer
Figure 12: PCB Layout
Design Example
Below is a design example following the
application
guidelines
based
on
these
specifications:
Table 2: Design Example
VIN
85Vac~265Vac
VOUT
40V
IOUT
115mA
Figure 13 shows the detailed application
schematic. This circuit is used for the typical
performance and circuit waveforms. For more
device applications, please refer to the related
evaluation board datasheets.



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