전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MP5017GD 데이터시트(PDF) 14 Page - Monolithic Power Systems

부품명 MP5017GD
상세설명  3V-.5.5V, 1A ??5A Current Limit Switch with Over-Voltage Clamp and Reverse Blocking in 2mmx3mm QFN Package
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MPS [Monolithic Power Systems]
홈페이지  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP5017GD 데이터시트(HTML) 14 Page - Monolithic Power Systems

Back Button MP5017GD Datasheet HTML 9Page - Monolithic Power Systems MP5017GD Datasheet HTML 10Page - Monolithic Power Systems MP5017GD Datasheet HTML 11Page - Monolithic Power Systems MP5017GD Datasheet HTML 12Page - Monolithic Power Systems MP5017GD Datasheet HTML 13Page - Monolithic Power Systems MP5017GD Datasheet HTML 14Page - Monolithic Power Systems MP5017GD Datasheet HTML 15Page - Monolithic Power Systems MP5017GD Datasheet HTML 16Page - Monolithic Power Systems MP5017GD Datasheet HTML 17Page - Monolithic Power Systems  
Zoom Inzoom in Zoom Outzoom out
 14 / 17 page
background image
MP5017 – 3V-5.5V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
MP5017 Rev.1.0
www.MonolithicPower.com
14
10/15/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
APPLICATION INFORMATION
Setting the Current Limit
The MP5017 current limit value should exceed
the normal maximum load current to account for
the variations in the current sense value. The
current limit is a function of the external current-
limit resistor. The value can be approximated
with Equation (2):
(2)
Table 2 and Figure 3 below list examples of
current limit values as a function of the resistor
value.
Table 2: Current Limit vs. Current Limit Resistor
Current Limit
Resistor (Ω)
1400
806
499
324
226
Current Limit (A)
0.9
1.51
2.40
3.61
5.04
Figure 3: Current Limit vs. Current Limit Resistor
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For best results, refer to Figure 4 and
follow the guidelines below.
1. Place the high-current paths (VCC and
VOUT) close to the device using short,
direct, and wide traces.
2. Place the input capacitor (C1) as close to
VCC and GND as possible.
3. Connect the VCC and VOUT pads to large
copper
traces
for
better
thermal
performance.
4. Place RLIMIT (R1) close to ILIMIT.
5. Place DV/DT capacitor (C3) close to DV/DT.
VCC
VOUT
GND
GND
R1
C3
Top Layer
Bottom Layer
Figure 4: Recommended Layout
)
(
R
10
1.16V
(A)
I
LIMIT
3
LIMIT
Ω
×
=



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com