| 전자부품 데이터시트 검색엔진 |
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AD6636PCB 데이터시트(PDF) 69 Page - Analog Devices |
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AD6636PCB 데이터시트(HTML) 69 Page - Analog Devices |
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69 / 72 page ![]() AD6636 Rev. 0 | Page 69 of 72 AGC 0, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC 0. Note that AGC 0 might be bypassed, and that AGC 0 here is representative of the datapath only. AGC 0, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 0. Note that AGC 0 might be bypassed, and that AGC 0 here is representative of the datapath only. AGC 1, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC 1. Note that AGC 1 might be bypassed and that AGC 1 here is representative of the datapath only. AGC 1, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 1. Note that AGC 1 might be bypassed and that AGC 1 here is representative of the datapath only. AGC 2, I Output <15:0: This read-only register provides the latest in-phase output sample from AGC 2. Note that AGC 2 might be bypassed and that AGC 2 here is representative of the datapath only. AGC 2, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 2. Note that AGC 2 might be bypassed and that AGC 2 here is representative of the datapath only. AGC 3, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC 3. Note that AGC 3 might be bypassed and that AGC 3 here is representative of the datapath only. AGC 3, Q output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 3. Note that AGC 3 might be bypassed and that AGC 3 here is representative of the datapath only. AGC 4, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC 4. Note that AGC 4 might be bypassed and that AGC 4 here is representative of the datapath only. AGC 4, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 4. Note that AGC 4 might be bypassed and that AGC 4 here is representative of the datapath only. AGC 5, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC 5. Note that AGC 5 might be bypassed and that AGC 5 here is representative of the datapath only. AGC 5, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC 5. Note that AGC 5 might be bypassed and that AGC 5 here is representative of the datapath only. AGC 0, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 0. This register is updated only when AGC 0 is enabled and operating. AGC 1, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 1. This register is updated only when AGC 1 is enabled and operating. AGC 2, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 2. This register is updated only when AGC 2 is enabled and operating. AGC 3, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 3. This register is updated only when AGC 3 is enabled and operating. AGC 4, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 4. This register is updated only when AGC 4 is enabled and operating. AGC 5, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC 5. This register is updated only when AGC 5 is enabled and operating. |
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