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CY2CC1810SC 데이터시트(PDF) 2 Page - Cypress Semiconductor

부품명 CY2CC1810SC
상세설명  1:10 Clock Fanout Buffer with Output Enable
PDF  8 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2CC1810SC 데이터시트(HTML) 2 Page - Cypress Semiconductor

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COMLINK™ SERIES
CY2CC1810
Document #: 38-07055 Rev. *C
Page 2 of 8
Maximum Ratings[1][2]
Storage Temperature: ................................ –65
°C to + 150°C
Ambient Temperature:................................... –40
°C to +85°C
Supply Voltage to Ground Potential
VCC .................................................................. –0.5V to 4.6V
Input ................................................................. –0.5V to 5.8V
Supply Voltage to Ground Potential
(Outputs only) ........................................ –0.5V to VDD + 0.5V
DC Output Voltage................................. –0.5V to VDD + 0.5V
Power Dissipation........................................................ 0.75W
DC Parameter @ 3.3V VDD = 3.3V ± 5%, TA= –40°C to +85°C (see Figure 6)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VOH
Output High Voltage
VDD = Min., VIN = VIH or VIL
IOH = –12 mA
2.3
3.3
V
VOL
Output Low Voltage
VDD = Min., VIN = VIH or VIL
IOL = 12 mA
0.2
0.5
V
VIH
Input High Voltage
Guaranteed Logic High Level
2
5.8
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
0.8
V
IIH
Input High Current
VDD = Max.
VIN = 2.7V
1
uA
IIL
Input Low Current
VDD = Max.
VIN = 0.5V
–1uA
II
Input High Current
VDD = Max., VIN = VDD(Max)
20
uA
VIK
Clamp Diode Voltage
VDD = Min., IIN = –18 mA
–0.7
–1.2
V
IOK
Continuous Clamp Current
VDD = Max., VOUT = GND
–50
mA
OOFF
Power-down Disable
VDD = GND, VOUT = < 4.5V
100
uA
VH
Input Hysteresis
80
mV
DC Parameter @ 2.5V VDD = 2.5V ± 5%, TA= –40°C to +85°C (see Figure 1)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VOH
Output High Voltage
VDD = Min., VIN = VIH or VIL
IOH= –7 mA
1.8
V
IOH= 12 mA
1.6
V
VOL
Output Low Voltage
VDD = Min., VIN = VIH or VIL
IOL = 12 mA
0.65
V
VIH
Input High Voltage
Guaranteed Logic High Level
1.6
5.0
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
0.8
V
IIH
Input High Current
VDD = Max.
VIN = 2.4V
1
uA
IIL
Input Low Current
VDD = Max.
VIN = 0.5V
–1uA
II
Input High Current
VDD = Max., VIN = VDD(Max.)
20
uA
VIK
Clamp Diode Voltage
VDD = Min., IIN = –18 mA
–0.7
–1.2
V
IOK
Continuous Clamp Current
VDD = Max., VOUT = GND
–50
mA
OOFF
Power-down Disable
VDD = GND, VOUT = < 4.5V
100
uA
VH
Input Hysteresis
80
mV
Capacitance
Symbol
Description
Test Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
2.5
pF
COUT
Output Capacitance
VOUT = 0V
6.5
pF
Note:
1.
Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2.
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.



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