LTM4620A datasheet(4/30 Pages) LINER

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LTM4649

4649fc

For more information www.linear.com/LTM4649

ELECTRICAL CHARACTERISTICS The

denotes the specifications which apply over the specified internal

operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V per typical application.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Slew Rate

(Note 5)

V/µs

GBP

Gain Bandwidth Product

(Note 5)

MHz

CMRR

Common Mode Rejection

(Note 3)

IDIFFOUT

DIFFOUT Current

Sourcing

RIN

Input Resistance

DIFFP, DIFFN to GND

kΩ

VPGOOD

PGOOD Trip Level

VFB With Respect to Set Output

VFB Ramping Negative

VFB Ramping Positive

–10

VPGL

PGOOD Voltage Low

IPGOOD = 2mA

0.1

0.3

INTVCC Linear Regulator

VINTVCC

Internal VCC Voltage

4.8

5.2

VINTVCC Load Reg INTVCC Load Regulation

ICC = 0mA to 50mA

0.9

Oscillator and Phase-Locked Loop

fSYNC

Frequency Sync Capture Range

250

800

kHz

Nominal Switching Frequency

400

450

500

kHz

RMODE

MODE Input Resistance

250

kΩ

VIH_CLKIN

Clock Input Level High

2.0

VIL_CLKIN

Clock Input Level Low

0.8

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime. Notes are automatically numbered when you apply

the note style.

Note 2: The LTM4649 is tested under pulsed load conditions such that

TJ ≈ TA. The LTM4649E is guaranteed to meet performance specifications

over the 0°C to 125°C internal operating temperature range. Specifications

over the –40°C to 125°C internal operating temperature range are assured

by design, characterization and correlation with statistical process

controls. The LTM4649I is guaranteed to meet specifications over the

–40°C to 125°C internal operating temperature range. Note that the

maximum ambient temperature consistent with these specifications is

determined by specific operating conditions in conjunction with board

layout, the rated package thermal resistance and other environmental

factors.

Note 3: 100% tested at wafer level.

Note 4: See output current derating curves for different VIN, VOUT and TA.

Note 5: Guaranteed by design.

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