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LTC2668 데이터시트(PDF) 22 Page - Linear Technology

부품명 LTC2668
상세설명  Octal, 16-Bit, 200ksps Differential 짹10.24V Input SoftSpan ADC with Wide Input Common Mode Range
PDF  40 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC2668 데이터시트(HTML) 22 Page - Linear Technology

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LTC2348-16
22
234816fa
For more information www.linear.com/LTC2348-16
to minimize SNR degradation over this bandwidth. An
additional filter network may be placed between the buf-
fer output and ADC input to further minimize the noise
contribution of the buffer and reduce disturbances to the
buffer from ADC acquisition transients. A simple one-pole
lowpass RC filter is sufficient for many applications. It is
important that the RC time constant of this filter be small
enough to allow the analog inputs to completely settle to
16-bit resolution within the ADC acquisition time (tACQ),
as insufficient settling can limit INL and THD performance.
Also note that the minimum acquisition time varies with
sampling frequency (fSMPL) and the number of enabled
channels.
High quality capacitors and resistors should be used in
the RC filters since these components can add distortion.
NPO/COG and silver mica type dielectric capacitors have
excellent linearity. Carbon surface mount resistors can
generate distortion from self-heating and from damage
that may occur during soldering. Metal film surface mount
resistors are much less susceptible to both problems.
applicaTions inForMaTion
Buffering Arbitrary and Fully Differential Analog Input
Signals
The wide common mode input range and high CMRR of
the LTC2348-16 allow each channel’s IN+ and IN– pins
to swing with an arbitrary relationship to each other,
provided each pin remains between (VCC – 4V) and VEE.
This unique feature of the LTC2348-16 enables it to accept
a wide variety of signal swings, simplifying signal chain
design. In many applications, connecting a channel’s IN+
and IN– pins directly to the existing signal chain circuitry
will not allow the channel’s sampling network to settle to
16-bit resolution within the ADC acquisition time (tACQ).
In these cases, it is recommended that two unity-gain
buffers be inserted between the signal source and the ADC
input pins, as shown in Figure 6a. Table 2 lists several
amplifier and lowpass filter combinations recommended
for use in this circuit. The LT1469 combines fast settling,
high linearity, and low offset with 5nV/√Hz input-referred
noise density, enabling it to achieve the full ADC data sheet
SNR and THD specifications, as shown in the FFT plots in
Figures 6b to 6e. In applications where slightly degraded
LTC2348-16
234816 F05
ONLY CHANNEL 0 SHOWN FOR CLARITY
0V
TRUE BIPOLAR
INPUT SIGNAL
IN0+
IN0–
BUFFER
AMPLIFIER
LOWPASS
SIGNAL FILTER
10nF
160
BW = 100kHz
Figure 5. True Bipolar Signal Chain with Input Filtering
Table 2. Recommended Amplifier and Filter Combinations for the Buffer Circuits in Figures 6a and 9. AC Performance Measured
Using Circuit in Figure 6a, ±10.24V Range
AMPLIFIER
RFILT
(Ω)
CFILT
(pF)
INPUT SIGNAL DRIVE
SNR
(dB)
THD
(dB)
SINAD
(dB)
SFDR
(dB)
½ LT1469
49.9
1000
FULLY DIFFERENTIAL
94.4
–119
94.4
121
½ LT1355
100
270
FULLY DIFFERENTIAL
94.3
–119
94.3
120
½ LT1469
49.9
1000
TRUE BIPOLAR
94.4
–109
94.3
110
½ LT1355
100
270
TRUE BIPOLAR
94.3
–107
94.1
108
½ LT1469
0
0
TRUE BIPOLAR
93.9
–109
93.8
110
½ LT1355
0
0
TRUE BIPOLAR
94.0
–107
93.8
108
½ LT1358
100
270
TRUE BIPOLAR
94.4
–109
94.3
110



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