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HMC902LP3E 데이터시트(PDF) 5 Page - Analog Devices |
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HMC902LP3E 데이터시트(HTML) 5 Page - Analog Devices |
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5 / 13 page ![]() Data Sheet HMC902LP3E Rev. E | Page 5 of 13 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NIC NIC RFIN GND NIC NIC RFOUT GND GND HMC902LP3E TOP VIEW (Not to Scale) PACKAGE BASE 12 11 10 9 1 3 4 2 NOTES 1. NIC = NOT INTERNALLY CONNECTED. HOWEVER, ALL DATA SHOWN IN THIS DATA SHEET IS MEASURED WITH THESE PINS CONNECTED TO RF/DC GROUND EXTERNALLY. 2. EXPOSED PAD. THE PACKAGE BOTTOM HAS AN EXPOSED METAL GROUND PADDLE THAT MUST BE CONNECTED TO RF/DC GROUND. Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1, 2, 5, 8, 11 to 13, 16 NIC Not Internally Connected. However, all data shown in this data sheet is measured with these pins connected to RF/dc ground externally. 3 RFIN RF Input. This pin is ac-coupled and matched to 50 Ω. See Figure 3 for the interface schematic. 4, 9 GND Ground. Connect these pins to RF/dc ground. See Figure 4 for the interface schematic. 6, 7 VGG1, VGG2 Optional Gate Control for Amplifier. If left open, the amplifier runs self biased at the standard current. Applying a negative voltage reduces drain current. External capacitors are required (see Figure 24). See Figure 5 for the interface schematic. 10 RFOUT RF Output. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the interface schematic. 14, 15 VDD2, VDD1 Power Supply Voltage for the Amplifier. See Figure 23 and Figure 24 for the application circuits. See Figure 7 for the interface schematic. EPAD Exposed Pad. The package bottom has an exposed metal ground paddle that must be connected to RF/dc ground. INTERFACE SCHEMATICS RFIN Figure 3. RFIN Interface Schematic GND Figure 4. GND Interface Schematic VGG1, VGG2 Figure 5. VGG1 and VGG2 Interface Schematic RFOUT Figure 6. RFOUT Interface Schematic VDD1, VDD2 Figure 7. VDD1 and VDD2 Interface Schematic |
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