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MM54HC75 데이터시트(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 MM54HC75
상세설명  4-Bit Bistable Latch with Q and Q Output
PDF  4 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

MM54HC75 데이터시트(HTML) 3 Page - National Semiconductor (TI)

  MM54HC75 Datasheet HTML 1Page - National Semiconductor (TI) MM54HC75 Datasheet HTML 2Page - National Semiconductor (TI) MM54HC75 Datasheet HTML 3Page - National Semiconductor (TI) MM54HC75 Datasheet HTML 4Page - National Semiconductor (TI)  
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AC Electrical Characteristics VCCe5V TAe25 C CLe15 pF tretfe6ns
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
tPHL tPLH
Maximum Propagation
ns
Delay Data to Q
tPHL tPLH
Maximum Propagation
ns
Delay Data to Q
tPHL tPLH
Maximum Propagation
ns
Delay Enable to Q
tPHL tPLH
Maximum Propagation
ns
Delay Enable to Q
ts
Minimum Set Up Time
ns
tH
Minimum Hold Time
b
ns
tW
Minimum Pulse Width
ns
AC Electrical Characteristics CLe50 pF tretfe6 ns (unless otherwise specified)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
tPHL tPLH
Maximum Propagation
V
ns
Delay Data to Q
V
ns
V
ns
tPHL tPLH
Maximum Propagation
V
ns
Delay Data to Q
V
ns
V
ns
tPHL tPLH
Maximum Propagation
V
ns
Delay Enable to Q
V
ns
V
ns
tPHL tPLH
Maximum Propagation
V
ns
Delay Enable to Q
V
ns
V
ns
ts
Minimum Set Up Time
V
ns
Data to Enable
V
ns
V
ns
tH
Minimum Hold Time
V
b
ns
Enable to Data
V
b
ns
V
b
ns
tW
Minimum Enable Pulse Width
V
ns
V
ns
V
ns
tTLH tTHL
Maximum Output
V
ns
Rise and Fall Time
V
ns
V
ns
CPD
Power Dissipation
per commonly
pF
Capacitance Note
clocked latched
pair
CIN
Maximum Input
pF
Capacitance
Note 5
CPD determines the no load dynamic power consumption PDeCPD VCC2 faICC VCC and the no load dynamic current consumption ISeCPD VCC faICC
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