전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

ICS840001 데이터시트(PDF) 7 Page - Integrated Circuit Systems

부품명 ICS840001
상세설명  FEMTOCLOCKS??CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS840001 데이터시트(HTML) 7 Page - Integrated Circuit Systems

Back Button ICS840001 Datasheet HTML 3Page - Integrated Circuit Systems ICS840001 Datasheet HTML 4Page - Integrated Circuit Systems ICS840001 Datasheet HTML 5Page - Integrated Circuit Systems ICS840001 Datasheet HTML 6Page - Integrated Circuit Systems ICS840001 Datasheet HTML 7Page - Integrated Circuit Systems ICS840001 Datasheet HTML 8Page - Integrated Circuit Systems ICS840001 Datasheet HTML 9Page - Integrated Circuit Systems ICS840001 Datasheet HTML 10Page - Integrated Circuit Systems ICS840001 Datasheet HTML 11Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
840001BG
www.icst.com/products/hiperclocks.html
REV. A MAY 10, 2004
7
Integrated
Circuit
Systems, Inc.
ICS840001
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
APPLICATION INFORMATION
Figure 2. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
The ICS840001 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 26.5625MHz, 18pF par-
allel resonant crystal and were chosen to minimize the ppm er-
ror. The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The ICS840001 provides separate
power supplies to isolate any high switching noise from the out-
puts to the internal PLL.V
DD, and VDDA should be individually con-
nected to the power supply plane through vias, and bypass ca-
pacitors should be used for each pin. To achieve optimum
jitter performance, power supply isolation is required.
Figure 1
illustrates how a 10
Ω resistor along with a 10µF and a .01µF
bypass capacitor should be connected to each V
DDA pin.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
DDA
10
µF
.01
µF
3.3V
.01
µF
V
DD
C1
33p
X1
18pF Parallel Crystal
C2
27p
XTAL_OUT
XTAL_IN



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com