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ICS951901 데이터시트(PDF) 7 Page - Integrated Circuit Systems |
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ICS951901 데이터시트(HTML) 7 Page - Integrated Circuit Systems |
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7 / 19 page ![]() 7 ICS951901 0670B—07/15/04 Byte 17: Output Rise/FallTime Select Register Byte 18: Output Rise/Fall Time Select Register t i BD W Pn o i t p i r c s e D 7 t i B1 l o r t n o C e t a R w e l S ) 0 : 3 ( I C P 6 t i B0 5 t i B1 l o r t n o C e t a R w e l S F _ I C P 4 t i B0 3 t i B1 l o r t n o C e t a R w e l S 2 K L C U P C 2 t i B0 1 t i B 0l o r t n o C e t a r w e l S 1 K L C U P C 0 t i B t i BD W Pn o i t p i r c s e D 7 t i B1 l o r t n o C e t a R w e l S : 2 1 M A R D S 6 t i B0 5 t i B1 l o r t n o C e t a R w e l S : 1 K L C P G A 4 t i B0 3 t i B1 l o r t n o C e t a R w e l S : 0 K L C P G A 2 t i B0 1 t i B1 l o r t n o C e t a R w e l S : 4 K L C I C P 0 t i B0 Byte 19: Output Rise/FallTime Select Register Byte 20: Output Rise/Fall Time Select Register t i BD W Pn o i t p i r c s e D 7 t i B1 l o r t n o C e t a R w e l S : z H M 8 4 6 t i B0 5 t i B1 l o r t n o C e t a R w e l S : z H M 8 4 _ 4 2 4 t i B0 3 t i B1 l o r t n o C e t a R w e l S : 1 F E R 2 t i B0 l o r t n o C e t a R w e l S : 0 F E R 1 t i B1 l o r t n o C e t a R w e l S : ) 0 : 1 1 ( M A R D S 0 t i B0 t i BD W Pn o i t p i r c s e D 7 t i B0 d e v r e s e R 6 t i B0 d e v r e s e R 5 t i B0 d e v r e s e R 4 t i B0 d e v r e s e R 3 t i B0 d e v r e s e R 2 t i B0 d e v r e s e R 1 t i B 0l o r t n o C e t a R w e l S 0 K L C U P C 0 t i B VCO Programming Constrains VCO Frequency ...................... 150MHz to 500MHz VCO Divider Range ................ 8 to 519 REF Divider Range ................. 2 to 129 Phase Detector Stability .......... 0.3536 to 1.4142 Useful Formula VCO Frequency = 14.31818 x VCO/REF divider value Phase Detector Stabiliy = 14.038 x (VCO divider value) -0.5 To program the VCO frequency for over-clocking. 0. Before trying to program our clock manually, consider using ICS provided software utilities for easy programming. 1. Select the frequency you want to over-clock from with the desire gear ratio (i.e. CPU:SDRAM:3V66:PCI ratio) by writing to byte 0, or using initial hardware power up frequency. 2. Write 0001, 1001 (19H) to byte 8 for readback of 21 bytes (byte 0-20). 3. Read back byte 11-20 and copy values in these registers. 4. Re-initialize the write sequence. 5. Write a '1' to byte 9 bit 7 and write to byte 11 & 12 with the desired VCO & REF divider values. 6. Write to byte 13 to 20 with the values you copy from step 3. This maintains the output spread, skew and slew rate. 7. The above procedure is only needed when changing the VCO for the 1st pass. If VCO frequency needed to be changed again, user only needs to write to byte 11 and 12 unless the system is to reboot. |
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