| 전자부품 데이터시트 검색엔진 |
|
MP2661 데이터시트(PDF) 21 Page - Monolithic Power Systems |
|
|
|||||||||||||||||||||||||||||
MP2661 데이터시트(HTML) 21 Page - Monolithic Power Systems |
|
21 / 35 page ![]() MP2661 – 0.5A, 1-CELL CHARGER W/ I2C CONTROL AND POWER PATH MP2661 Rev. 1.03 www.MonolithicPower.com 21 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018MPS. All Rights Reserved. Int_gate Int_gate _delay INT Int_ext Vin Power on 0V 5V 600ns Vth t t t t t t Int_dly Figure 6: INT signal during Vin powers on If FET_DIS is set to 1 during the shipping mode, the IC could still wake up after INT keeping low for 4s. But in this case, the FET_DIS bit can not be reset to 0 automatically, it has to be reset to 0 manually through I2C. 2). Reset Mode The IC can use INT to cut off the path from the battery to the system when system reset is needed. Once the logic at INT is set to low for more than 16s, the battery is disconnected from the system by turning off the battery MOSFET. The off state lasts for 4s, then the battery MOSFET is turned on automatically, and the system is powered by the battery again. During the 4s off period, INT pin voltage level could be high or low. The IC can reset the system by controlling INT (see Figure 7). Figure 7: System Reset Function Operation Profile |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |