AC208-DS04-405-R datasheet(32/58 Pages) BOARDCOM

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AC208

Preliminary Data Sheet

07/08/02

B roa dcom

Page 24 PHY Registers

Document

AC208-DS04-405-R

PHY STATUS REGISTER

Table 20: PHY Status Register 1

Bit

Name

Definition

Mode

Default

1.15

100BASE-T4

Tied to 0 indicates no 100BASE-T4 capability.

1.14

100BASE-TX

Full-duplex

Tied to 0 indicates no 100BASE-TX full-duplex support.

1.13

100BASE-TX

Half-duplex

1 = 100BASE-TX with half-duplex.

0 = No TX half-duplex ability.

1.12

10BASE-T Full-

duplex

Tied to 0 indicates no 10BASE-T full-duplex support.

1.11

10BASE-T Half-

duplex

1 = 10BASE-T with half-duplex.

0 = No 10BASE-T half-duplex ability.

1.10:6

Reserved

00001

1.5

Auto-Negotiate

Complete

1 = Auto-negotiate process completed, indicates Reg. 4, 5, 6 are

valid.

0 = Auto-negotiate process not completed.

N/A

1.4

Remote Fault

1 = Remote fault condition detected.

0 = No remote fault.

After this bit is set, it remains set until it is cleared by reading

SC/LH

N/A

1.3

Auto-Negotiate

Ability

1 = Able to perform auto-negotiation function, its value is

determined by ANEGA pin.

0 = Unable to perform auto-negotiation function.

1.2

Link Status

1 = Link is established. If AC208 link fails, this bit becomes

cleared and remains cleared until register is read via the MDC/

MDIO interface.

0 = Link is down, or has been dropped.

SC/LL

1.1

Jabber Detect

1 = Jabber condition detect.

0 = No Jabber condition detected.

SC/LH

1.0

Extended

Capability

1 = Extended register capable. This bit is tied permanently to

one.

1.15

100BASE-T4

Tied to 0 indicates no 100BASE-T4 capability.

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