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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TLE6211 데이터시트(PDF) 23 Page - Infineon Technologies AG |
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TLE6211 데이터시트(HTML) 23 Page - Infineon Technologies AG |
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23 / 35 page  TLE 6210 TLE 6211 Block Description and Electrical Characteristics V1.2 Data Sheet 23 2002-08 4.11 Watchdog To supervise the operation of 2 m-processors watchdog logic for two input signals is integrated. The logic expects at each WD1 and WD2 rectangular signals with 10 ms high and 10 ms low time. Deviations from the expected time are counted as errors and influence the output signals. A digital filter suppresses noise or pulses below 3 clock cycles (typ. 3 ms). The detection ciruit is described in Figure 12. After power up and 1or 2 valid watchdog edges the WD logic enables the output Drivers. Figure 5 Enable output EN after correct watchdog signals at WD1 and WD2 are present; WD1 and WD2 start with logic Low Figure 6 Enable output EN after correct watchdog signals at WD1 and WD2 are present; WD1 and WD2 start with logic High 1 0 1 0 1 0 WD1 WD2 EN 12 10ms 3* t CLK after the 2nd WD-edge (falling edge) wd-start-up-with Low AD 04/02 1 0 1 0 1 0 WD1 WD2 EN 12 3 * t CLK after 1st. WD edge 10ms wd-start-up-with High AD 04/02 |
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