CS5014 datasheet(22/40 Pages) CIRRUS

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Analog Input Range/Coding Format

The reference voltage directly defines the input

voltage range in both the unipolar and bipolar

configurations. In the unipolar configuration

(BP/UP low), the first code transition occurs

0.5 LSB above AGND, and the final code transi-

tion occurs 1.5 LSB’s below VREF. Coding is in

straight binary format. In the bipolar configura-

tion (BP/UP high), the first code transition occurs

0.5 LSB above -VREF and the last transition oc-

curs 1.5 LSB’s below +VREF. Coding is in an

offset-binary format. Positive full scale gives a

digital output of all ones, and negative full scale

gives a digital output of all zeros.

The BP/UP mode pin may be switched after cali-

bration without having to recalibrate the

converter. However, the BP/UP mode should be

changed during the previous conversion cycle,

that is, between HOLD falling and EOC falling.

If BP/UP is changed at any other time, one

dummy conversion cycle must be allowed for

proper acquisition of the input.

Grounding and Power Supply Decoupling

The CS5012A/14/16 use the analog ground con-

nection, AGND, only as a reference voltage. No

dc power currents flow through the AGND con-

nection, and it is completely independent of

DGND. However, any noise riding on the AGND

input relative to the system’s analog ground will

induce conversion errors. Therefore, both the ana-

log input and reference voltage should be referred

to the AGND pin, which should be used as the

entire system’s analog ground reference point.

The digital and analog supplies to the

CS5012A/14/16 are pinned out separately to

minimize coupling between the analog and digital

sections of the chip. All four supplies should be

decoupled to their respective grounds using

0.1

µF ceramic capacitors. If significant low-fre-

quency noise is present on the supplies, 1

µF

tantalum capacitors are recommended in parallel

with the 0.1

µF capacitors.

The p ositive d igital power supply of the

CS5012A/14/16 must never exceed the positive

analog supply by more than a diode drop or the

device could experience permanent damage. If

the two supplies are derived from separate

sources, care must be taken that the analog sup-

ply comes up first at power-up. The system

connection diagram in Figure 36 shows a decou-

pling scheme which allows the CS5012A/14/16

to be powered from a single set of

± 5V rails.

As with any high-precision A/D converter, the

CS5012A/14/16 require careful attention to

grounding and layout arrangements. However, no

unique layout issues must be addressed to prop-

erly apply the device.

CS5012A, CS5014, CS5016

2-28

DS14F8

CS5012A CS5014 CS5016

DS14F9

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